1. Field of the Invention
The present invention relates to a flash memory device and a controlling method of the flash memory device, and more particularly to a flash memory device with a wear-leveling mechanism and its controlling method.
2. Description of Related Art
Since nonvolatile memory storage devices adopting NAND flash memories come with the advantages of small size, power-saving, and shock-resisting features, nonvolatile memory storage devices are used extensively in various different application systems such as network servers, notebook computers, desktop computers, portable music players and mobile communication devices, etc.
With reference to FIG. 1 for a system block diagram of a traditional flash memory device, the flash memory device 8 comprises a controller 81 and at least one flash memory 82, wherein the flash memory 82 is used for storing data, and the controller 81 is connected to an application system 9 for receiving an instruction issued by the application system 9 to perform an operation of accessing data according to the operation corresponding to the instruction to record the data inputted by the application system 9 into the flash memory 82 or processing the data read from flash memory 82 and requested by the application system 9. In such a structure, the flash memory 82 stores and writes data by a memory cell array comprised of a plurality of memory units, wherein the memory cell array is arranged into a plurality of physical memory blocks, and each memory block includes a plurality of memory pages. In an access operation, the flash memory 82 uses the memory page as a unit of reading and writing, and the memory block as a unit of erasing data.
At present, flash memory has relatively short use life when it is used for storing data. In other words, the erase count of flash memory is an issue remaining to be solved. As we all know, flash memory generally uses a memory block as a unit to execute an erase operation for a block before the data is written into the flash memory, wherein each memory block will increase the accumulated erase count due to the erase operation performed before writing data. If the erase count of the memory block reaches the limitation of the flash memory, the reliability of data retention will be gradually degraded, and the flash memory may not record data reliably and correctly. Furthermore, failures may occur, since some of the memory blocks of a memory unit of the flash memory device are degraded. In general, the maximum allowable erase count of a flash memory falls in a range from one thousand times to ten thousand times (depending on the structure of the flash memory), and the frequent access operations will affect the life of the flash memory substantially.
To reduce the difference of accumulated erase count of each memory block, we must use each memory block evenly by means of a wear-leveling technique to prevent excessive use of a particular memory block and thereby avoid an early cessation of service or an unreliable or incorrect data storage of the flash memory device before all memory blocks are fully used.
The present wear-leveling techniques are mainly divided into two types: a dynamic wear-leveling technique and a static wear-leveling technique. In the dynamic wear-leveling technique, an erased memory block with the smallest erase count is selected for storing updated data, when the data recorded and stored in a memory block is updated. Since only the address of dynamic data having an updated content will be adjusted, this technique is called the dynamic wear-leveling technique.
In the static wear-leveling technique, the static wear-leveling operation will be started immediately if the difference between the largest accumulated erase count and the smallest accumulated erase count of a memory block reaches a predetermined threshold, even though the data recorded and stored in a memory block has not been updated. When the static wear-leveling operation is executed, the controller moves the data stored in a memory block having the smallest accumulated erase count to an erased memory block having the largest accumulated erase count, and erases the memory block having the smallest accumulated erase count. Therefore, the memory block address of the static data can be changed, and the memory block previously occupied by static data for a long time can be released, and the memory block having a lower accumulated erase count can be provided for the use of writing other updated data, so as to adjust the memory block address of the static data and achieve the static wear-leveling effect.
However, the static wear leveling operation consumes much time and resources to search for the memory block having a lower accumulated erase count, and the dynamic wear-leveling operation is performed for a memory block having updated data only, and thus the drawback of having uneven erases still exists, and there is a long-desired need for improving the performance of the wear leveling operation.